In order to improve bandwidth usage, it is necessary to minimize the amount of bits allotted for system usage. For instance, the existing public safety systems require improved bandwidth usage. This can be done by migrating the current 25 kHz systems and the 12.5 kHz systems to 6.25 kHz systems with equivalent bandwidths. It is therefore extremely desirable to make as efficient use of possible existing codes and parity checks for improving system performance. Some of the existing codes and parity checks are Simple Parity Check (SPC), hamming code, extended hamming code, a Bose-Chaudhari-Hocquenghem (BCH) code and or an extended BCH code.
Moreover, various Block Product Codes (BPC) are used to provide forward error correction for various Layer 2 signaling fields. However, the BPC is used only to correct errors. No attempts are made to detect any errors from the turbo decoding, other than any checksum or Cyclic redundancy Check (CRC) parity included with the information bits.
Therefore, there is a need for a method for increasing an accuracy of error detection while incurring no additional overheads in terms of additional bit usage.